Low Latency Trading Insights: Selected Essays on Performance Engineering for High Frequency Trading
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Publisher
Independently published
ISBN
ISBN-13: 9798279160433Synopsis
In high-frequency trading, a cache miss costs thousands per hour. A mispredicted branch burns 15 cycles you'll never get back.
From a 15-year HFT veteran and author of Low Latency Trading Insights on Substack, this book covers what production trading systems actually demand: CPU architecture, cache optimization, SIMD vectorization, lock-free data structures, and system call avoidance. Every chapter opens with a real incidentโthe $50,000 NVDA lesson, the lock-free order book that lost to a mutex, the memory pool that ate Chicago.
What's Inside:
Hardware Fundamentals CPU architecture that compilers can't optimize for you Memory hierarchy from SRAM cells to NUMA topology Cache behavior, prefetching strategies, and false sharing Branch predictionโand when branchless code wins Compiler Mastery Why your "fast" code becomes slow after optimization Undefined behavior as a performance tool (and its dangers) Link-time optimization and position-independent code trade-offs SIMD fundamentals, auto-vectorization, and practical patterns Floating-point performance: FMA, denormals, and when fixed-point fails Concurrency Memory models that work (and memory_order_consume, which doesn't) Lock-free programming: when it helps, when it kills performance SPSC queues achieving 18ns push/pop operations Why mutexes often beat "lock-free" in production System-Level Performance System call overhead and the vDSO Memory allocation for microsecond latency I/O patterns that don't block your hot path Network programming for exchange connectivity Case Studies High-performance parsing: SIMD techniques for market data Trading systems architecture: order books, matching engines, feed handlers Who This Book Is For: C++ developers targeting HFT, game engines, or embedded systems Engineers who need to understand what's happening beneath their code Anyone preparing for quantitative trading developer interviews Every benchmark runs on Intel Xeon and AMD EPYC with numbers you can reproduce. No theory without measurement.
Based on the author's popular Substack newsletter, refined through feedback from thousands of HFT professionals.
From a 15-year HFT veteran and author of Low Latency Trading Insights on Substack, this book covers what production trading systems actually demand: CPU architecture, cache optimization, SIMD vectorization, lock-free data structures, and system call avoidance. Every chapter opens with a real incidentโthe $50,000 NVDA lesson, the lock-free order book that lost to a mutex, the memory pool that ate Chicago.
What's Inside:
Hardware Fundamentals CPU architecture that compilers can't optimize for you Memory hierarchy from SRAM cells to NUMA topology Cache behavior, prefetching strategies, and false sharing Branch predictionโand when branchless code wins Compiler Mastery Why your "fast" code becomes slow after optimization Undefined behavior as a performance tool (and its dangers) Link-time optimization and position-independent code trade-offs SIMD fundamentals, auto-vectorization, and practical patterns Floating-point performance: FMA, denormals, and when fixed-point fails Concurrency Memory models that work (and memory_order_consume, which doesn't) Lock-free programming: when it helps, when it kills performance SPSC queues achieving 18ns push/pop operations Why mutexes often beat "lock-free" in production System-Level Performance System call overhead and the vDSO Memory allocation for microsecond latency I/O patterns that don't block your hot path Network programming for exchange connectivity Case Studies High-performance parsing: SIMD techniques for market data Trading systems architecture: order books, matching engines, feed handlers Who This Book Is For: C++ developers targeting HFT, game engines, or embedded systems Engineers who need to understand what's happening beneath their code Anyone preparing for quantitative trading developer interviews Every benchmark runs on Intel Xeon and AMD EPYC with numbers you can reproduce. No theory without measurement.
Based on the author's popular Substack newsletter, refined through feedback from thousands of HFT professionals.
Dimensions
9 inches ร 1.05 inches ร 6 inches